Integrated circuit and system design: power and timing modeling, optimization and simulation : 18th international workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008 ; revised selected papers
| Corporate Author: | |
|---|---|
| Contributors: | ; |
| Format: | Print Book |
| Language: | English |
| Subito Delivery Service: | Order now. |
| Check availability: | HBZ Gateway |
| WorldCat: | WorldCat |
| Fernleihe: | Fernleihe für die Fachinformationsdienste |
| Published: |
Berlin Heidelberg [u.a.]
Springer
2009
|
| In: |
Lecture notes in computer science (5349)
Year: 2009 |
| Series/Journal: | Lecture notes in computer science
5349 |
| Standardized Subjects / Keyword chains: | B
Integrated circuits
|
| Further subjects: | B
Computer-aided design Congresses
B Integrated circuits Design and construction Congresses B Integrated circuits Testing Congresses B Conference program 2008 (Lisbon) B Computers Power supply Congresses |
| Online Access: |
Cover Inhaltsverzeichnis (Verlag) |
MARC
| LEADER | 00000cam a2200000 4500 | ||
|---|---|---|---|
| 001 | 590974254 | ||
| 003 | DE-627 | ||
| 005 | 20240421004822.0 | ||
| 007 | tu | ||
| 008 | 090204s2009 gw ||||| 00| ||eng c | ||
| 010 | |a 2009920524 | ||
| 015 | |a 09,N07,0079 |2 dnb | ||
| 015 | |a 09,N07,0079 |2 dnb | ||
| 016 | 7 | |a 992291658 |2 DE-101 | |
| 020 | |a 3540959475 |c PB. : EUR 65.22 (freier Pr.), sfr 101.50 (freier Pr.) |9 3-540-95947-5 | ||
| 020 | |a 9783540959472 |c : PB. : EUR 65.22 (freier Pr.), sfr 101.50 (freier Pr.) |9 978-3-540-95947-2 | ||
| 024 | 3 | |a 9783540959472 | |
| 024 | 8 | |a 12609772 |q Best.-Nr. | |
| 028 | 5 | 2 | |a 12609772 |
| 035 | |a (DE-627)590974254 | ||
| 035 | |a (DE-576)303617918 | ||
| 035 | |a (DE-599)DNB992291658 | ||
| 035 | |a (OCoLC)845477125 | ||
| 035 | |a (OCoLC)698906862 | ||
| 035 | |a (OCoLC)845477125 | ||
| 040 | |a DE-627 |b ger |c DE-627 |e rakwb | ||
| 041 | |a eng | ||
| 044 | |c XA-DE-BE |c XD-US | ||
| 050 | 0 | |a TK7874.75 | |
| 082 | 0 | |a 620/.004202825536 |q LOC |2 23 | |
| 082 | 0 | |a 004 |q OCLC | |
| 082 | 0 | |a 190f |q OCLC | |
| 082 | 0 | |a 272f |q OCLC | |
| 082 | 0 | |a 620 | |
| 082 | 0 | 4 | |a 620 |a 004 |
| 082 | 0 | 4 | |a 004 |
| 084 | |a 1 |2 ssgn | ||
| 084 | |a SS 4800 |2 rvk |0 (DE-625)rvk/143528: | ||
| 084 | |a 53.55 |2 bkl | ||
| 090 | |a a | ||
| 245 | 1 | 0 | |a Integrated circuit and system design |b power and timing modeling, optimization and simulation : 18th international workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008 ; revised selected papers |c Lars Svensson; José Monteiro (eds.) |
| 264 | 1 | |a Berlin |a Heidelberg [u.a.] |b Springer |c 2009 | |
| 300 | |a XIII, 462 S. |b Ill., graph. Darst. |c 235 mm x 155 mm | ||
| 336 | |a Text |b txt |2 rdacontent | ||
| 337 | |a ohne Hilfsmittel zu benutzen |b n |2 rdamedia | ||
| 338 | |a Band |b nc |2 rdacarrier | ||
| 490 | 1 | |a Lecture notes in computer science / Theoretical Computer Science and General Issues |v 5349 | |
| 500 | |a Literaturangaben | ||
| 583 | 1 | |a Archivierung prüfen |c 20200919 |f DE-640 |z 3 |2 pdager | |
| 583 | 1 | |a Archivierung/Langzeitarchivierung gewährleistet |f PEBW |x XA-DE-BW |2 pdager |5 DE-31 | |
| 583 | 1 | |a Archivierung prüfen |c 20240324 |f DE-4165 |z 1 |2 pdager | |
| 601 | |a September | ||
| 650 | 0 | |a Integrated circuits |x Design and construction |v Congresses | |
| 650 | 0 | |a Integrated circuits |x Testing |v Congresses | |
| 650 | 0 | |a Computers |x Power supply |v Congresses | |
| 650 | 0 | |a Computer-aided design |v Congresses | |
| 655 | 7 | |a Konferenzschrift |y 2008 |z Lissabon |0 (DE-588)1071861417 |0 (DE-627)826484824 |0 (DE-576)433375485 |2 gnd-content | |
| 689 | 0 | 0 | |d s |0 (DE-588)4312536-0 |0 (DE-627)124346359 |0 (DE-576)211146684 |2 gnd |a Entwurfsautomation |
| 689 | 0 | |5 DE-101 | |
| 700 | 1 | |a Svensson, Lars |e Hrsg. |4 edt | |
| 700 | 1 | |a Monteiro, José |4 oth | |
| 711 | 2 | |0 (DE-588)16000900-5 |0 (DE-627)593019644 |0 (DE-576)303511036 |4 oth |a PATMOS |n 18 |d 2008 |c Lissabon | |
| 776 | 1 | |z 9783540959489 | |
| 830 | 0 | |a Lecture notes in computer science |v 5349 |9 5349 |w (DE-627)129300152 |w (DE-576)014492687 |w (DE-600)121909-1 |x 0302-9743 |7 ns | |
| 856 | 4 | 2 | |u http://d-nb.info/992291658/04 |m B:DE-101 |q application/pdf |v 20130501 |x Verlag |3 Inhaltsverzeichnis |
| 856 | 4 | 2 | |u https://swbplus.bsz-bw.de/bsz303617918cov.jpg |m V:DE-576 |m X:springer |q image/jpeg |v 20090403054144 |3 Cover |
| 935 | |i sf | ||
| 935 | |i Blocktest | ||
| 936 | r | v | |a SS 4800 |b Lecture notes in computer science |k Informatik |k Enzyklopädien und Handbücher. Kongressberichte Schriftenreihe. Tafeln und Formelsammlungen |k Schriftenreihen (indiv. Sign.) |k Lecture notes in computer science |0 (DE-627)1271461242 |0 (DE-625)rvk/143528: |0 (DE-576)201461242 |
| 936 | b | k | |a 53.55 |j Mikroelektronik |0 (DE-627)10641853X |
| 951 | |a BO | ||
| ACO | |a 1 | ||
| ELC | |b 1 | ||
| LOK | |0 000 xxxxxcx a22 zn 4500 | ||
| LOK | |0 001 3982685214 | ||
| LOK | |0 003 DE-627 | ||
| LOK | |0 004 590974254 | ||
| LOK | |0 005 20211001131317 | ||
| LOK | |0 008 210930||||||||||||||||ger||||||| | ||
| LOK | |0 040 |a DE-Tue135 |c DE-627 |d DE-Tue135 | ||
| LOK | |0 092 |o n | ||
| LOK | |0 852 |a DE-Tue135 | ||
| LOK | |0 852 1 |9 00 | ||
| ORI | |a SA-MARC-ixtheoa001.raw | ||
| REL | |a 1 | ||
| STA | 0 | 0 | |a Integrated circuits |
| STB | 0 | 0 | |a Circuits intégrés |
| STC | 0 | 0 | |a Circuitos integrados |
| STD | 0 | 0 | |a Automazione della progettazione elettronica |
| STF | 0 | 0 | |a 電子設計自動化 |
| STG | 0 | 0 | |a Software de projeto de circuitos integrados |
| STH | 0 | 0 | |a Автоматизация проектирования электроники |
| SUB | |a REL | ||
| SYG | 0 | 0 | |a Design automation,DA,Integrierte Schaltung,Electronic design automation,EDA,Rechnerunterstützter Schaltungsentwurf,Electronic CAD,ECAD |
| TIM | |a 100020080101_100020081231 |b 2008 - 2008 | ||